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* Copyright:                   *
* Vishay Intertechnology, Inc. *
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*Aug 11, 2014
*ECN S14-1657, Rev. C
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si1411DH 4 1 2
M1  3 1 2 2 PMOS W=311126u L=0.25u            
M2  2 1 2 4 NMOS W=311126u L=0.35u  
R1  4 3     RTEMP 170E-2
CGS 1 2     180E-12
DBD 4 2     DBD
***************************************************************  
.MODEL  PMOS       PMOS  ( LEVEL  = 3          TOX    = 7E-8
+ RS     = 30E-2           RD     = 0          NSUB   = 1.7E17
+ KP     = 2.6E-6          UO     = 400             
+ VMAX   = 0               XJ     = 5E-7       KAPPA  = 1E-5
+ ETA    = 1E-4            TPG    = -1  
+ IS     = 0               LD     = 0                        
+ CGSO   = 0               CGDO   = 0          CGBO   = 0 
+ TLEV   = 1               BEX    = -1.5       TCV    = 5.8E-3
+ NFS    = 0.8E12          DELTA  = 0.1)
*************************************************************** 
.MODEL  NMOS       NMOS  ( LEVEL  = 3          TOX    = 7E-8
+NSUB    = 2E16            TPG    = -1)   
*************************************************************** 
.MODEL DBD D (CJO=15E-12 VJ=0.38 M=0.16
+RS=0.1 FC=0.5 IS=1E-12 TT=6E-8 N=1 BV=152)
*************************************************************** 
.MODEL RTEMP R (TC1=8.5E-3 TC2=5.5E-6)
*************************************************************** 
.ENDS